Academic Performance and Friendship Relation in Students: Role of Personality

Abstract: There have been many studies about personality role in students’ studies in recent years. However, these studies do not provide a comprehensive model. In addition, statistical researchers have just attended the relationship between each individual’s personality and his academic performance without considering the impact of people around him on his educationalachievements. In this research, a social simulation has been propounded which shows the impact of an individual’s personality and other people around him in his academic performance using multi-agent systems. Each individual in the simulation has five personality factors which came from the theory of “big five personality”. The simulation is prepared as a tool with a user interface to set parameters and see the result of each simulation. The parameters have been considered by experts to be replaced during the test phase. Data used for simulation was taken with the help of the “big five personality” questionnaire distributed among 35 second-year computer students in Iran University of Science and Technology. Reliability and validity of questions have been previously reviewed by experts. Simulation was executed on the data and the results had been prepared using each student’s personality and adding the friendship links between them. It has been shown that taking into account each student’s friends’ personality can improve the simulation results

Optimization-based power and thermal management for dark silicon aware 3D chip multiprocessors using heterogeneous cache hierarchy

Management of a problem recently known as “dark silicon” is a new challenge in multicore designs. Prior innovative studies have addressed the dark silicon problem in the fields of power-efficient core design. However, addressing dark silicon challenges in uncore component designs such as cache hierarchy, on-chip interconnect etc. that consume significant portion of the on-chip power consumption is largely unexplored. In this paper, for the first time, we propose an integrated approach which considers the impact of power consumption of core and uncore components simultaneously to improve multi/many-core performance in the dark silicon era. The proposed approach dynamically (1) predicts the changing program behavior on each core; (2) re-determines frequency/voltage, cache capacity and technology in each level of the cache hierarchy based on the program's scalability in order to satisfy the power and temperature constraints. In the proposed architecture, for future chip-multiprocessors (CMPs), we exploit emerging technologies such as non-volatile memories (NVMs) and 3D techniques to combat dark silicon. Also, for the first time, we propose a detailed power model which is useful for future dark silicon CMPs power modeling. Experimental results on SPEC 2000/2006 benchmarks show that the proposed method improves throughput by about 54.3% and energy-delay product by about 61% on average, respectively, in comparison with the conventional CMP architecture with homogenous cache system. (A preliminary short version of this work was presented in the 18th Euromicro Conference on Digital System Design (DSD), 2015.) © 2017 Elsevier B.V

A heterogeneous memory organization with minimum energy consumption in 3D chip-multiprocessors

Main memories play an important role in overall energy consumption of embedded systems. Using conventional memory technologies in future designs in nanoscale era cause a drastic increase in leakage power consumption and temperature-related problems. Emerging non-volatile memory (NVM) technologies offer many desirable characteristics such as near-zero leakage power, high density and non-volatility. They can significantly mitigate the issue of memory leakage power in future embedded chip-multiprocessor (eCMP) systems. However, they suffer from challenges such as limited write endurance and high write energy consumption which restrict them for adoption in modern memory systems. In this article, we propose a stacked hybrid memory system for 3D chip-multiprocessors to take advantages of both traditional and non-volatile memory technologies. For reaching this target, we present a convex optimization-based model that minimizes the system energy consumption while satisfy endurance constraint in order to design a reliable memory system. Experimental results show that the proposed method improves energy-delay product (EDP) and performance by about 44.8% and 13.8% on average respectively compared with the traditional memory design where single technology is used. © 2016 IEEE

Reconfigurable logic blocks based on a discrete chaotic circuit : implementation of all fundamental two input, one output logic functions

In this paper, we implement the first realization of a reconfigurable chaotic based logic block that can morph between all two input, one output logic functions. This logic block is constructed based on a discrete time chaotic circuit known as Logistic Map and can directly emulate operation of all two input, one output combinational functions. We have derived instruction set table of this logic block that can be used as a look up table to generate different logic functions. Furthermore, we propose a method to enhance robustness of the constructed logic block with respect to environmental noise. Constructed logic block provides opportunities and possibilities to construct more efficient and higher order reconfigurable logic blocks

Experimental realization of a reconfigurable three input, one output logic function based on a chaotic circuit.

This paper addresses and reports the construction of a reconfigurable logic block that can morph between all three input, one output logic functions based on chaos computing theory. The logic block is constructed based on a discrete chaotic circuit and can emulate all three input, one output logic functions. We have derived instruction set table of this logic block from the block that can be used as a look up table to generate any special three input, one output logic function. Additionally, sensitivity of constructed logic block to noise is investigated and a method for enhancing robustness of block with respect to the environment noise is proposed and implemented. This chaotic block offers inventive approaches for constructing higher order logic functions

A novel online gait optimization approach for biped robots with point-feet

Designing a stable walking gait for biped robots with point-feet is stated as a constrained nonlinear optimization problem which is normally solved by an offline numerical optimization method. On the result of an unknown modeling error or environment change, the designed gait may be ineffective and an online gait improvement is impossible after the optimization. In this paper, we apply Generalized Path Integral Stochastic Optimal Control to closed-loop model of planar biped robots with point-feet which leads to an online Reinforcement Learning algorithm to design the walking gait. We study the ability of the proposed method to adapt the controller of RABBIT, which is a planar biped robot with point-feet, for stable walking. The simulation results show that the method, starting a dynamically unstable initial gait, quickly compensates the modeling error and reaches to a walking with exponential stability and desired features in a new situation which was impossible by the past methods

Robust decentralized voltage control for uncertain DC microgrids

A decentralized voltage control scheme to achieve robust stability and robust performance of islanded direct current (DC) microgrids is presented in this paper. The investigated microgrid consists of multiple distributed generation (DG) units with a general topology, each one comprising a local uncertain ZIP (constant impedance (Z), constant current (I), and constant power (P)) load. The proposed controller confers the following main advantages: 1) the design procedure is scalable, 2) it has a completely decentralized structure, 3) it prepares stability and desirable performance of the nominal closed-loop microgrid, 4) it preserves robust stability as well as robust performance of microgrid system under different sources of uncertainty, including plug-and-play (PnP) functionalities of DGs, microgrid topology changes, uncertain ZIP load, and unmodeled load dynamics, 5) every local controller is the solution of a unique convex optimization problem, resulting in the optimal performance and robustness to several different successive changes. First, a linear time-invariant (LTI) state-space model is developed for each DG subsystem with capturing disturbances, and different uncertainty sources are modeled as a new single polytope. Then, all control objectives are converted into a robust dynamic output-feedback-based controller for an LTI polytopic system with performance criterion. Finally, the obtained nonconvex problem is reduced to a linear matrix inequality (LMI) based optimization problem. Several simulation case studies are carried out in MATLAB to demonstrate the effectiveness of the proposed controller